cpu.c File Reference

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Macros
#define	foreach_x86_cpu_uarch
#define	foreach_aarch64_cpu_uarch

Functions
u8 *	format_cpu_uarch (u8 *s, va_list *args)
u8 *	format_cpu_model_name (u8 *s, va_list *args)
static char const *	flag_skip_prefix (char const *flag, const char *pfx, int len)
u8 *	format_cpu_flags (u8 *s, va_list *args)

Macro Definition Documentation

foreach_aarch64_cpu_uarch

#define foreach_aarch64_cpu_uarch

Value:

_(0x41, 0xd03, "ARM", "Cortex-A53", 0) \
 _(0x41, 0xd07, "ARM", "Cortex-A57", 0) \
 _(0x41, 0xd08, "ARM", "Cortex-A72", 0) \
 _(0x41, 0xd09, "ARM", "Cortex-A73", 0) \
 _(0x41, 0xd0a, "ARM", "Cortex-A75", 0) \
 _(0x41, 0xd0b, "ARM", "Cortex-A76", 0) \
 _(0x41, 0xd0c, "ARM", "Neoverse-N1", 0) \
 _(0x41, 0xd4a, "ARM", "Neoverse-E1", 0) \
 _(0x43, 0x0a1, "Marvell", "THUNDERX CN88XX", 0) \
 _(0x43, 0x0a2, "Marvell", "OCTEON TX CN81XX", 0) \
 _(0x43, 0x0a3, "Marvell", "OCTEON TX CN83XX", 0) \
 _(0x43, 0x0af, "Marvell", "THUNDERX2 CN99XX", 1) \
 _(0x43, 0x0b1, "Marvell", "OCTEON TX2 CN98XX", 1) \
 _(0x43, 0x0b2, "Marvell", "OCTEON TX2 CN96XX", 1)

Definition at line 69 of file cpu.c.

foreach_x86_cpu_uarch

#define foreach_x86_cpu_uarch

Value:

_(0x06, 0x9e, "Kaby Lake", "Kaby Lake DT/H/S/X") \
 _(0x06, 0x8e, "Kaby Lake", "Kaby Lake Y/U") \
 _(0x06, 0x8c, "Tiger Lake", "Tiger Lake U") \
 _(0x06, 0x86, "Tremont", "Elkhart Lake") \
 _(0x06, 0x85, "Knights Mill", "Knights Mill") \
 _(0x06, 0x7e, "Ice Lake", "Ice Lake U") \
 _(0x06, 0x7d, "Ice Lake", "Ice Lake Y") \
 _(0x06, 0x7a, "Goldmont Plus", "Gemini Lake") \
 _(0x06, 0x6c, "Ice Lake", "Ice Lake SP") \
 _(0x06, 0x6a, "Ice Lake", "Ice Lake DE") \
 _(0x06, 0x66, "Cannon Lake", "Cannon Lake U") \
 _(0x06, 0x5f, "Goldmont", "Denverton") \
 _(0x06, 0x5e, "Skylake", "Skylake DT/H/S") \
 _(0x06, 0x5c, "Goldmont", "Apollo Lake") \
 _(0x06, 0x5a, "Silvermont", "Moorefield") \
 _(0x06, 0x57, "Knights Landing", "Knights Landing") \
 _(0x06, 0x56, "Broadwell", "Broadwell DE") \
 _(0x06, 0x55, "Skylake", "Skylake X/SP") \
 _(0x06, 0x4f, "Broadwell", "Broadwell EP/EX") \
 _(0x06, 0x4e, "Skylake", "Skylake Y/U") \
 _(0x06, 0x4d, "Silvermont", "Rangeley") \
 _(0x06, 0x4c, "Airmont", "Braswell") \
 _(0x06, 0x47, "Broadwell", "Broadwell H") \
 _(0x06, 0x46, "Haswell", "Crystalwell") \
 _(0x06, 0x45, "Haswell", "Haswell ULT") \
 _(0x06, 0x3f, "Haswell", "Haswell E") \
 _(0x06, 0x3e, "Ivy Bridge", "Ivy Bridge E/EN/EP") \
 _(0x06, 0x3d, "Broadwell", "Broadwell U") \
 _(0x06, 0x3c, "Haswell", "Haswell") \
 _(0x06, 0x3a, "Ivy Bridge", "IvyBridge") \
 _(0x06, 0x37, "Silvermont", "BayTrail") \
 _(0x06, 0x36, "Saltwell", "Cedarview,Centerton") \
 _(0x06, 0x35, "Saltwell", "Cloverview") \
 _(0x06, 0x2f, "Westmere", "Westmere EX") \
 _(0x06, 0x2e, "Nehalem", "Nehalem EX") \
 _(0x06, 0x2d, "Sandy Bridge", "SandyBridge E/EN/EP") \
 _(0x06, 0x2c, "Westmere", "Westmere EP/EX,Gulftown") \
 _(0x06, 0x2a, "Sandy Bridge", "Sandy Bridge") \
 _(0x06, 0x27, "Saltwell", "Medfield") \
 _(0x06, 0x26, "Bonnell", "Tunnel Creek") \
 _(0x06, 0x25, "Westmere", "Arrandale,Clarksdale") \
 _(0x06, 0x1e, "Nehalem", "Clarksfield,Lynnfield,Jasper Forest") \
 _(0x06, 0x1d, "Penryn", "Dunnington") \
 _(0x06, 0x1c, "Bonnell", "Pineview,Silverthorne") \
 _(0x06, 0x1a, "Nehalem", "Nehalem EP,Bloomfield)") \
 _(0x06, 0x17, "Penryn", "Yorkfield,Wolfdale,Penryn,Harpertown")

Definition at line 20 of file cpu.c.

Function Documentation

flag_skip_prefix()

static char const* flag_skip_prefix ( char const *  flag, const char *  pfx, int  len  )

inlinestatic

Definition at line 198 of file cpu.c.

format_cpu_flags()

u8* format_cpu_flags	(	u8 *	s,
		va_list *	args
	)

Definition at line 206 of file cpu.c.

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format_cpu_model_name()

u8* format_cpu_model_name	(	u8 *	s,
		va_list *	args
	)

Definition at line 150 of file cpu.c.

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format_cpu_uarch()

u8* format_cpu_uarch	(	u8 *	s,
		va_list *	args
	)

Definition at line 86 of file cpu.c.

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