FD.io VPP  v19.04.4-rc0-5-ge88582fac
Vector Packet Processing
pci.h
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1 /*
2  * Copyright (c) 2018 Cisco and/or its affiliates.
3  * Licensed under the Apache License, Version 2.0 (the "License");
4  * you may not use this file except in compliance with the License.
5  * You may obtain a copy of the License at:
6  *
7  * http://www.apache.org/licenses/LICENSE-2.0
8  *
9  * Unless required by applicable law or agreed to in writing, software
10  * distributed under the License is distributed on an "AS IS" BASIS,
11  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12  * See the License for the specific language governing permissions and
13  * limitations under the License.
14  */
15 
16 #ifndef __included_virtio_pci_h__
17 #define __included_virtio_pci_h__
18 
19 /* VirtIO ABI version, this must match exactly. */
20 #define VIRTIO_PCI_ABI_VERSION 0
21 
22 /*
23  * VirtIO Header, located in BAR 0.
24  */
25 #define VIRTIO_PCI_HOST_FEATURES 0 /* host's supported features (32bit, RO) */
26 #define VIRTIO_PCI_GUEST_FEATURES 4 /* guest's supported features (32, RW) */
27 #define VIRTIO_PCI_QUEUE_PFN 8 /* physical address of VQ (32, RW) */
28 #define VIRTIO_PCI_QUEUE_NUM 12 /* number of ring entries (16, RO) */
29 #define VIRTIO_PCI_QUEUE_SEL 14 /* current VQ selection (16, RW) */
30 #define VIRTIO_PCI_QUEUE_NOTIFY 16 /* notify host regarding VQ (16, RW) */
31 #define VIRTIO_PCI_STATUS 18 /* device status register (8, RW) */
32 #define VIRTIO_PCI_ISR 19 /* interrupt status register, reading
33  * also clears the register (8, RO) */
34 /* Only if MSIX is enabled: */
35 #define VIRTIO_MSI_CONFIG_VECTOR 20 /* configuration change vector (16, RW) */
36 #define VIRTIO_MSI_QUEUE_VECTOR 22 /* vector for selected VQ notifications
37  (16, RW) */
38 
39 /*
40  * Vector value used to disable MSI for queue.
41  * define in include/linux/virtio_pci.h
42  * #define VIRTIO_MSI_NO_VECTOR 0xFFFF
43  */
44 
45 /* The bit of the ISR which indicates a device has an interrupt. */
46 #define VIRTIO_PCI_ISR_INTR 0x1
47 /* The bit of the ISR which indicates a device configuration change. */
48 #define VIRTIO_PCI_ISR_CONFIG 0x2
49 
50 /* VirtIO device IDs. */
51 #define VIRTIO_ID_NETWORK 0x01
52 
53 /* Status byte for guest to report progress. */
54 #define foreach_virtio_config_status_flags \
55  _ (VIRTIO_CONFIG_STATUS_RESET, 0x00) \
56  _ (VIRTIO_CONFIG_STATUS_ACK, 0x01) \
57  _ (VIRTIO_CONFIG_STATUS_DRIVER, 0x02) \
58  _ (VIRTIO_CONFIG_STATUS_DRIVER_OK, 0x04) \
59  _ (VIRTIO_CONFIG_STATUS_FEATURES_OK, 0x08) \
60  _ (VIRTIO_CONFIG_STATUS_DEVICE_NEEDS_RESET, 0x40) \
61  _ (VIRTIO_CONFIG_STATUS_FAILED, 0x80)
62 
63 typedef enum
64 {
65 #define _(a, b) a = b,
67 #undef _
69 
70 #define foreach_virtio_net_feature_flags \
71  _ (VIRTIO_NET_F_CSUM, 0) /* Host handles pkts w/ partial csum */ \
72  _ (VIRTIO_NET_F_GUEST_CSUM, 1) /* Guest handles pkts w/ partial csum */ \
73  _ (VIRTIO_NET_F_CTRL_GUEST_OFFLOADS, 2) /* Dynamic offload configuration. */ \
74  _ (VIRTIO_NET_F_MTU, 3) /* Initial MTU advice. */ \
75  _ (VIRTIO_NET_F_MAC, 5) /* Host has given MAC address. */ \
76  _ (VIRTIO_NET_F_GSO, 6) /* Host handles pkts w/ any GSO. */ \
77  _ (VIRTIO_NET_F_GUEST_TSO4, 7) /* Guest can handle TSOv4 in. */ \
78  _ (VIRTIO_NET_F_GUEST_TSO6, 8) /* Guest can handle TSOv6 in. */ \
79  _ (VIRTIO_NET_F_GUEST_ECN, 9) /* Guest can handle TSO[6] w/ ECN in. */ \
80  _ (VIRTIO_NET_F_GUEST_UFO, 10) /* Guest can handle UFO in. */ \
81  _ (VIRTIO_NET_F_HOST_TSO4, 11) /* Host can handle TSOv4 in. */ \
82  _ (VIRTIO_NET_F_HOST_TSO6, 12) /* Host can handle TSOv6 in. */ \
83  _ (VIRTIO_NET_F_HOST_ECN, 13) /* Host can handle TSO[6] w/ ECN in. */ \
84  _ (VIRTIO_NET_F_HOST_UFO, 14) /* Host can handle UFO in. */ \
85  _ (VIRTIO_NET_F_MRG_RXBUF, 15) /* Host can merge receive buffers. */ \
86  _ (VIRTIO_NET_F_STATUS, 16) /* virtio_net_config.status available */ \
87  _ (VIRTIO_NET_F_CTRL_VQ, 17) /* Control channel available */ \
88  _ (VIRTIO_NET_F_CTRL_RX, 18) /* Control channel RX mode support */ \
89  _ (VIRTIO_NET_F_CTRL_VLAN, 19) /* Control channel VLAN filtering */ \
90  _ (VIRTIO_NET_F_CTRL_RX_EXTRA, 20) /* Extra RX mode control support */ \
91  _ (VIRTIO_NET_F_GUEST_ANNOUNCE, 21) /* Guest can announce device on the network */ \
92  _ (VIRTIO_NET_F_MQ, 22) /* Device supports Receive Flow Steering */ \
93  _ (VIRTIO_NET_F_CTRL_MAC_ADDR, 23) /* Set MAC address */ \
94  _ (VIRTIO_F_NOTIFY_ON_EMPTY, 24) \
95  _ (VHOST_F_LOG_ALL, 26) /* Log all write descriptors */ \
96  _ (VIRTIO_F_ANY_LAYOUT, 27) /* Can the device handle any descripor layout */ \
97  _ (VIRTIO_RING_F_INDIRECT_DESC, 28) /* Support indirect buffer descriptors */ \
98  _ (VIRTIO_RING_F_EVENT_IDX, 29) /* The Guest publishes the used index for which it expects an interrupt \
99  * at the end of the avail ring. Host should ignore the avail->flags field. */ \
100 /* The Host publishes the avail index for which it expects a kick \
101  * at the end of the used ring. Guest should ignore the used->flags field. */ \
102  _ (VHOST_USER_F_PROTOCOL_FEATURES, 30)
103 
104 #define VIRTIO_NET_F_MTU 3
105 #define VIRTIO_NET_S_LINK_UP 1 /* Link is up */
106 #define VIRTIO_NET_S_ANNOUNCE 2 /* Announcement is needed */
107 
108 /* Common configuration */
109 #define VIRTIO_PCI_CAP_COMMON_CFG 1
110 /* Notifications */
111 #define VIRTIO_PCI_CAP_NOTIFY_CFG 2
112 /* ISR Status */
113 #define VIRTIO_PCI_CAP_ISR_CFG 3
114 /* Device specific configuration */
115 #define VIRTIO_PCI_CAP_DEVICE_CFG 4
116 /* PCI configuration access */
117 #define VIRTIO_PCI_CAP_PCI_CFG 5
118 
119 #define VIRTIO_PCI_QUEUE_ADDR_SHIFT 12
120 
121 #define VIRTIO_PCI_VRING_ALIGN 4096
122 
123 #define virtio_log_debug(vim, vif, f, ...) \
124 { \
125  vlib_log(VLIB_LOG_LEVEL_DEBUG, vim->log_default, "%U: " f, \
126  format_vlib_pci_addr, &vif->pci_addr, \
127  ##__VA_ARGS__); \
128 };
129 
130 #define virtio_log_warning(vim, vif, f, ...) \
131 { \
132  vlib_log(VLIB_LOG_LEVEL_WARNING, vim->log_default, "%U: " f, \
133  format_vlib_pci_addr, &vif->pci_addr, \
134  ##__VA_ARGS__); \
135 };
136 
137 #define virtio_log_error(vim, vif, f, ...) \
138 { \
139  vlib_log(VLIB_LOG_LEVEL_ERR, vim->log_default, "%U: " f, \
140  format_vlib_pci_addr, &vif->pci_addr, \
141  ##__VA_ARGS__); \
142 };
143 
144 typedef enum
145 {
150 
151 /* This is the PCI capability header: */
152 typedef struct
153 {
154  u8 cap_vndr; /* Generic PCI field: PCI_CAP_ID_VNDR */
155  u8 cap_next; /* Generic PCI field: next ptr. */
156  u8 cap_len; /* Generic PCI field: capability length */
157  u8 cfg_type; /* Identifies the structure. */
158  u8 bar; /* Where to find it. */
159  u8 padding[3]; /* Pad to full dword. */
160  u32 offset; /* Offset within bar. */
161  u32 length; /* Length of the structure, in bytes. */
163 
164 typedef struct
165 {
166  struct virtio_pci_cap cap;
167  u32 notify_off_multiplier; /* Multiplier for queue_notify_off. */
169 
170 /* Fields in VIRTIO_PCI_CAP_COMMON_CFG: */
171 typedef struct
172 {
173  /* About the whole device. */
174  u32 device_feature_select; /* read-write */
175  u32 device_feature; /* read-only */
176  u32 guest_feature_select; /* read-write */
177  u32 guest_feature; /* read-write */
178  u16 msix_config; /* read-write */
179  u16 num_queues; /* read-only */
180  u8 device_status; /* read-write */
181  u8 config_generation; /* read-only */
182 
183  /* About a specific virtqueue. */
184  u16 queue_select; /* read-write */
185  u16 queue_size; /* read-write, power of 2. */
186  u16 queue_msix_vector; /* read-write */
187  u16 queue_enable; /* read-write */
188  u16 queue_notify_off; /* read-only */
189  u32 queue_desc_lo; /* read-write */
190  u32 queue_desc_hi; /* read-write */
191  u32 queue_avail_lo; /* read-write */
192  u32 queue_avail_hi; /* read-write */
193  u32 queue_used_lo; /* read-write */
194  u32 queue_used_hi; /* read-write */
196 
197 typedef struct
198 {
203 } vring_desc_t;
204 
205 typedef struct
206 {
209  u16 ring[0];
210  /* u16 used_event; */
211 } vring_avail_t;
212 
213 typedef struct
214 {
218 
219 typedef struct
220 {
224  /* u16 avail_event; */
225 } vring_used_t;
226 
227 typedef struct
228 {
232  /* return */
236  u8 mac_addr[6];
240 
241 extern void debug_device_config_space (vlib_main_t * vm, virtio_if_t * vif);
242 extern void device_status (vlib_main_t * vm, virtio_if_t * vif);
246 
247 #endif /* __included_virtio_pci_h__ */
248 /*
249  * fd.io coding-style-patch-verification: ON
250  *
251  * Local Variables:
252  * eval: (c-set-style "gnu")
253  * End:
254  */
u32 len
Definition: pci.h:200
unsigned long u64
Definition: types.h:89
u16 next
Definition: pci.h:202
int virtio_pci_delete_if(vlib_main_t *vm, virtio_if_t *ad)
Definition: pci.c:1186
u16 idx
Definition: pci.h:208
u16 flags
Definition: pci.h:221
void device_status(vlib_main_t *vm, virtio_if_t *vif)
Definition: pci.c:357
unsigned char u8
Definition: types.h:56
u32 notify_off_multiplier
Definition: pci.h:167
u32 offset
Definition: pci.h:160
u64 addr
Definition: pci.h:199
#define foreach_virtio_config_status_flags
Definition: pci.h:54
unsigned int u32
Definition: types.h:88
u32 padding
Definition: vhost_user.h:115
unsigned short u16
Definition: types.h:57
u32 length
Definition: pci.h:161
vlib_main_t * vm
Definition: buffer.c:312
virtio_config_status_flags_t
Definition: pci.h:63
u16 flags
Definition: pci.h:207
signed int i32
Definition: types.h:77
void debug_device_config_space(vlib_main_t *vm, virtio_if_t *vif)
Definition: pci.c:385
clib_error_t * error
Definition: pci.h:238
u32 device_feature_select
Definition: pci.h:174
u32 guest_feature_select
Definition: pci.h:176
u16 idx
Definition: pci.h:222
u16 flags
Definition: pci.h:201
virtio_msix_status_t
Definition: pci.h:144
void virtio_pci_create_if(vlib_main_t *vm, virtio_pci_create_if_args_t *args)
Definition: pci.c:989