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Vector Packet Processing
vmxnet3.h
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1 /*
2  * Copyright (c) 2018 Cisco and/or its affiliates.
3  * Licensed under the Apache License, Version 2.0 (the "License");
4  * you may not use this file except in compliance with the License.
5  * You may obtain a copy of the License at:
6  *
7  * http://www.apache.org/licenses/LICENSE-2.0
8  *
9  * Unless required by applicable law or agreed to in writing, software
10  * distributed under the License is distributed on an "AS IS" BASIS,
11  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12  * See the License for the specific language governing permissions and
13  * limitations under the License.
14  */
15 
16 #ifndef __included_vmnet_vmnet_h__
17 #define __included_vmnet_vmnet_h__
18 
19 #define foreach_vmxnet3_tx_func_error \
20  _(ERROR_PACKETS, "error packets") \
21  _(LINK_DOWN, "link down") \
22  _(NO_FREE_SLOTS, "no free tx slots")
23 
24 typedef enum
25 {
26 #define _(f,s) VMXNET3_TX_ERROR_##f,
28 #undef _
31 
32 #define foreach_vmxnet3_rxmode_flags \
33  _(0, UCAST, "unicast") \
34  _(1, MCAST, "multicast") \
35  _(2, BCAST, "broadcast") \
36  _(3, ALL_MULTI, "all multicast") \
37  _(4, PROMISC, "promiscuous")
38 
39 enum
40 {
41 #define _(a, b, c) VMXNET3_RXMODE_##b = (1 << a),
43 #undef _
44 };
45 
46 #define foreach_vmxnet3_show_entry \
47  _(RX_COMP, "rx comp") \
48  _(RX_DESC0, "rx desc 0") \
49  _(RX_DESC1, "rx desc 1") \
50  _(TX_COMP, "tx comp") \
51  _(TX_DESC, "tx desc")
52 
53 enum
54 {
55 #define _(a, b) VMXNET3_SHOW_##a,
57 #undef _
58 };
59 
60 /* BAR 0 */
61 #define VMXNET3_REG_IMR 0x0000 /* Interrupt Mask Register */
62 #define VMXNET3_REG_TXPROD 0x0600 /* Tx Producer Index */
63 #define VMXNET3_REG_RXPROD 0x0800 /* Rx Producer Index for ring 1 */
64 #define VMXNET3_REG_RXPROD2 0x0A00 /* Rx Producer Index for ring 2 */
65 
66 
67 /* BAR 1 */
68 #define VMXNET3_REG_VRRS 0x0000 /* VMXNET3 Revision Report Selection */
69 #define VMXNET3_REG_UVRS 0x0008 /* UPT Version Report Selection */
70 #define VMXNET3_REG_DSAL 0x0010 /* Driver Shared Address Low */
71 #define VMXNET3_REG_DSAH 0x0018 /* Driver Shared Address High */
72 #define VMXNET3_REG_CMD 0x0020 /* Command */
73 #define VMXNET3_REG_MACL 0x0028 /* MAC Address Low */
74 #define VMXNET3_REG_MACH 0x0030 /* MAC Address High */
75 #define VMXNET3_REG_ICR 0x0038 /* Interrupt Cause Register */
76 #define VMXNET3_REG_ECR 0x0040 /* Event Cause Register */
77 
78 #define VMXNET3_VLAN_LEN 4
79 #define VMXNET3_FCS_LEN 4
80 #define VMXNET3_MTU (1514 + VMXNET3_VLAN_LEN + VMXNET3_FCS_LEN)
81 
82 #define VMXNET3_RXF_BTYPE (1 << 14) /* rx body buffer type */
83 #define VMXNET3_RXF_GEN (1 << 31) /* rx generation */
84 #define VMXNET3_RXCF_IP6 (1 << 20) /* rx ip6 packet */
85 #define VMXNET3_RXCF_IP4 (1 << 21) /* rx ip4 packet */
86 #define VMXNET3_RXCF_GEN (1 << 31) /* rx completion generation */
87 #define VMXNET3_RXC_INDEX (0xFFF) /* rx completion index mask */
88 
89 #define VMXNET3_TXF_GEN (1 << 14) /* tx generation */
90 #define VMXNET3_TXF_EOP (1 << 12) /* tx end of packet */
91 #define VMXNET3_TXF_CQ (1 << 13) /* tx completion request */
92 #define VMXNET3_TXCF_GEN (1 << 31) /* tx completion generation */
93 #define VMXNET3_TXC_INDEX (0xFFF) /* tx completion index mask */
94 
95 #define VMXNET3_RX_RING_SIZE 2
96 #define VMXNET3_INPUT_REFILL_THRESHOLD 32
97 #define VMXNET3_NUM_TX_DESC 1024
98 #define VMXNET3_NUM_TX_COMP VMXNET3_NUM_TX_DESC
99 #define VMXNET3_NUM_RX_DESC 1024
100 #define VMXNET3_NUM_RX_COMP VMXNET3_NUM_RX_DESC
101 
102 #define VMXNET3_VERSION_MAGIC 0x69505845
103 #define VMXNET3_SHARED_MAGIC 0xbabefee1
104 #define VMXNET3_VERSION_SELECT 1
105 #define VMXNET3_UPT_VERSION_SELECT 1
106 #define VMXNET3_MAX_INTRS 25
107 #define VMXNET3_IC_DISABLE_ALL 0x1
108 
109 #define VMXNET3_GOS_BITS_32 (1 << 0)
110 #define VMXNET3_GOS_BITS_64 (2 << 0)
111 #define VMXNET3_GOS_TYPE_LINUX (1 << 2)
112 #define VMXNET3_RXCL_LEN_MASK (0x3FFF) // 14 bits
113 #define VMXNET3_RXCL_ERROR (1 << 14)
114 #define VMXNET3_RXCI_EOP (1 << 14)
115 #define VMXNET3_RXCI_SOP (1 << 15)
116 
117 #define foreach_vmxnet3_device_flags \
118  _(0, INITIALIZED, "initialized") \
119  _(1, ERROR, "error") \
120  _(2, ADMIN_UP, "admin-up") \
121  _(3, IOVA, "iova") \
122  _(4, LINK_UP, "link-up") \
123  _(5, SHARED_TXQ_LOCK, "shared-txq-lock") \
124  _(6, ELOG, "elog")
125 
126 enum
127 {
128 #define _(a, b, c) VMXNET3_DEVICE_F_##b = (1 << a),
130 #undef _
131 };
132 
133 #define foreach_vmxnet3_set_cmds \
134  _(0, ACTIVATE_DEV, "activate device") \
135  _(1, QUIESCE_DEV, "quiesce device") \
136  _(2, RESET_DEV, "reset device") \
137  _(3, UPDATE_RX_MODE, "update rx mode") \
138  _(4, UPDATE_MAC_FILTERS, "update mac filters") \
139  _(5, UPDATE_VLAN_FILTERS, "update vlan filters") \
140  _(6, UPDATE_RSSIDT, "update rss idt") \
141  _(7, UPDATE_IML, "update iml") \
142  _(8, UPDATE_PMCFG, "update pm cfg") \
143  _(9, UPDATE_FEATURE, "update feature") \
144  _(10, STOP_EMULATION, "stop emulation") \
145  _(11, LOAD_PLUGIN, "load plugin") \
146  _(12, ACTIVATE_VF, "activate vf") \
147  _(13, RESERVED3, "reserved 3") \
148  _(14, RESERVED4, "reservced 4") \
149  _(15, REGISTER_MEMREGS, "register mem regs")
150 
151 enum
152 {
153 #define _(a, b, c) VMXNET3_CMD_##b = (a + 0xCAFE0000),
155 #undef _
156 };
157 
158 #define foreach_vmxnet3_get_cmds \
159  _(0, GET_QUEUE_STATUS, "get queue status") \
160  _(1, GET_STATS, "get stats") \
161  _(2, GET_LINK, "get link") \
162  _(3, GET_PERM_MAC_LO, "get perm mac lo") \
163  _(4, GET_PERM_MAC_HI, "get perm mac hi") \
164  _(5, GET_DID_LO, "get did lo") \
165  _(6, GET_DID_HI, "get did hi") \
166  _(7, GET_DEV_EXTRA_INFO, "get dev extra info") \
167  _(8, GET_CONF_INTR, "get conf intr") \
168  _(9, GET_ADAPTIVE_RING_INFO, "get adaptive ring info") \
169  _(10, GET_TXDATA_DESC_SIZE, "get txdata desc size") \
170  _(11, RESERVED5, "reserved5")
171 
172 enum
173 {
174 #define _(a, b, c) VMXNET3_CMD_##b = (a + 0xF00D0000),
176 #undef _
177 };
178 
179 typedef CLIB_PACKED (struct
180  {
181  u32 version; u32 guest_info; u32 version_support;
182  u32 upt_version_support; u64 upt_features;
183  u64 driver_data_address; u64 queue_desc_address;
184  u32 driver_data_len; u32 queue_desc_len;
185  u32 mtu;
186  u16 max_num_rx_sg; u8 num_tx_queues; u8 num_rx_queues;
187  u32 pad[4];
188  }) vmxnet3_misc_config;
189 
190 typedef CLIB_PACKED (struct
191  {
192  u8 mask_mode;
193  u8 num_intrs;
194  u8 event_intr_index;
195  u8 moderation_level[VMXNET3_MAX_INTRS]; u32 control;
196  u32 pad[2];
197  }) vmxnet3_interrupt_config;
198 
199 typedef CLIB_PACKED (struct
200  {
201  u32 mode;
202  u16 multicast_len;
203  u16 pad; u64 multicast_address; u8 vlan_filter[512];
204  }) vmxnet3_rx_filter_config;
205 
206 typedef CLIB_PACKED (struct
207  {
208  u32 version; u32 length;
209  u64 address;
210  }) vmxnet3_variable_config;
211 
212 typedef CLIB_PACKED (struct
213  {
214  u32 magic;
215  u32 pad;
216  vmxnet3_misc_config misc;
217  vmxnet3_interrupt_config interrupt;
218  vmxnet3_rx_filter_config rx_filter;
219  vmxnet3_variable_config rss;
220  vmxnet3_variable_config pattern;
221  vmxnet3_variable_config plugin; u32 ecr;
222  u32 pad1[5];
223  }) vmxnet3_shared;
224 
225 typedef CLIB_PACKED (struct
226  {
227  u8 stopped;
228  u8 pad[3];
229  u32 error;
230  }) vmxnet3_queue_status;
231 
232 typedef CLIB_PACKED (struct
233  {
234  u32 num_deferred; u32 threshold;
235  u64 pad;
236  }) vmxnet3_tx_queue_control;
237 
238 typedef CLIB_PACKED (struct
239  {
240  u64 desc_address;
241  u64 data_address;
242  u64 comp_address; u64 driver_data_address; u64 pad;
243  u32 num_desc;
244  u32 num_data;
245  u32 num_comp; u32 driver_data_len; u8 intr_index;
246  u8 pad1[7];
247  }) vmxnet3_tx_queue_config;
248 
249 typedef CLIB_PACKED (struct
250  {
251  u64 tso_pkts;
252  u64 tso_bytes;
253  u64 ucast_pkts; u64 ucast_bytes; u64 mcast_pkts;
254  u64 mcast_bytes;
255  u64 bcast_pkts; u64 bcast_bytes; u64 error_pkts;
256  u64 discard_pkts;
257  }) vmxnet3_tx_stats;
258 
259 typedef CLIB_PACKED (struct
260  {
261  vmxnet3_tx_queue_control ctrl;
262  vmxnet3_tx_queue_config cfg;
263  vmxnet3_queue_status status; vmxnet3_tx_stats stats;
264  u8 pad[88];
265  }) vmxnet3_tx_queue;
266 
267 typedef CLIB_PACKED (struct
268  {
269  u8 update_prod; u8 pad[7];
270  u64 pad1;
271  }) vmxnet3_rx_queue_control;
272 
273 typedef CLIB_PACKED (struct
274  {
275  u64 desc_address[2];
276  u64 comp_address; u64 driver_data_address; u64 pad;
277  u32 num_desc[2];
278  u32 num_comp; u32 driver_data_len; u8 intr_index;
279  u8 pad1[7];
280  }) vmxnet3_rx_queue_config;
281 
282 typedef CLIB_PACKED (struct
283  {
284  u64 lro_pkts;
285  u64 lro_bytes;
286  u64 ucast_pkts; u64 ucast_bytes; u64 mcast_pkts;
287  u64 mcast_bytes;
288  u64 bcast_pkts; u64 bcast_bytes; u64 nobuf_pkts;
289  u64 error_pkts;
290  }) vmxnet3_rx_stats;
291 
292 typedef CLIB_PACKED (struct
293  {
294  vmxnet3_rx_queue_control ctrl;
295  vmxnet3_rx_queue_config cfg;
296  vmxnet3_queue_status status; vmxnet3_rx_stats stats;
297  u8 pad[88];
298  }) vmxnet3_rx_queue;
299 
300 typedef CLIB_PACKED (struct
301  {
302  vmxnet3_tx_queue tx; vmxnet3_rx_queue rx;
303  }) vmxnet3_queues;
304 
305 /*
306  * flags:
307  * buffer length -- bits 0-13
308  * buffer type -- bit 14
309  * descriptor type -- bit 15
310  * reserved -- bits 16-30
311  * generation -- bit 31
312  */
313 typedef CLIB_PACKED (struct
314  {
315  u64 address;
316  u32 flags;
317  u32 pad;
318  }) vmxnet3_rx_desc;
319 
320 /*
321  * index:
322  * RX desc index -- bits 0-11
323  * ext1 -- bits 12-13
324  * end of packet -- bit 14
325  * start of packet -- bit 15
326  * ring ID -- bits 16-25
327  * RSS hash type -- bits 26-29
328  * checksum not calculated -- bit 30
329  * ext2 -- bit 31
330  *
331  * rss: RSS hash value
332  *
333  * len:
334  * data length -- bits 0-13
335  * error -- bit 14
336  * tag is stripped -- bit 15
337  * tag stripped -- bits 16-31
338  *
339  * flags:
340  * checksum -- bits 0 - 15
341  * tcp/udp checksum correct-- bit 16
342  * udp packet -- bit 17
343  * tcp packet -- bit 18
344  * ip checksum correct -- bit 19
345  * ipv6 -- bit 20
346  * ipv4 -- bit 21
347  * ip fragment -- bit 22
348  * frame crc correct -- bit 23
349  * completion type -- bits 24-30
350  * generation -- bit 31
351  */
352 typedef CLIB_PACKED (struct
353  {
354  u32 index; u32 rss;
355  u32 len;
356  u32 flags;
357  }) vmxnet3_rx_comp;
358 
359 /*
360  * index:
361  * TX desc index -- bits 0-11
362  * ext1 -- bits 12-31
363  *
364  * flags:
365  * reserved -- bits 0-23
366  * completion type -- bits 24-30
367  * generation -- bit 31
368  */
369 typedef CLIB_PACKED (struct
370  {
371  u32 index;
372  u32 pad[2];
373  u32 flags;
374  }) vmxnet3_tx_comp;
375 
376 /*
377  * flags[0]:
378  * length -- bits 0-13
379  * generation -- bit 14
380  * reserved -- bit 15
381  * descriptor type -- bit 16
382  * ext1 -- bit 17
383  * MSS, checksum offset -- bits 18-31
384  * flags[1]:
385  * header length -- bits 0-9
386  * offload mode -- bits 10-11
387  * end of packet -- bit 12
388  * completion request -- bit 13
389  * ext2 -- bit 14
390  * vlan tag insertion -- bit 15
391  * tag to insert -- bits 16-31
392  */
393 typedef CLIB_PACKED (struct
394  {
395  u64 address;
396  u32 flags[2];
397  }) vmxnet3_tx_desc;
398 
399 typedef struct
400 {
401  CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
409 
410 typedef struct
411 {
412  CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
416 
417 typedef struct
418 {
419  CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
423  vmxnet3_rx_desc *rx_desc[VMXNET3_RX_RING_SIZE];
424  vmxnet3_rx_comp *rx_comp;
426 } vmxnet3_rxq_t;
427 
428 typedef struct
429 {
430  CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
436 
437 typedef struct
438 {
439  CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
443 
444 typedef struct
445 {
446  CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
449 
450  vmxnet3_tx_desc *tx_desc;
451  vmxnet3_tx_comp *tx_comp;
454 } vmxnet3_txq_t;
455 
456 typedef CLIB_PACKED (struct
457  {
458  vmxnet3_queues queues; vmxnet3_shared shared;
459  }) vmxnet3_dma;
460 
461 typedef struct
462 {
463  CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
466 
471  vlib_pci_addr_t pci_addr;
472  void *bar[2];
473 
474  /* queues */
477 
481 
483  u8 mac_addr[6];
484 
485  /* error */
487 
488  vmxnet3_dma *dma;
489 
492 
493 typedef struct
494 {
501 
503 
504 typedef struct
505 {
506  vlib_pci_addr_t addr;
510  /* return */
515 
516 typedef struct
517 {
522 
525 
529 
530 /* format.c */
534 
535 #define vmxnet3_log_debug(dev, f, ...) \
536  vlib_log (VLIB_LOG_LEVEL_DEBUG, vmxnet3_main.log_default, "%U: " f, \
537  format_vlib_pci_addr, vlib_pci_get_addr(dev->pci_dev_handle), \
538  ## __VA_ARGS__)
539 
540 #define vmxnet3_log_error(dev, f, ...) \
541  vlib_log (VLIB_LOG_LEVEL_ERR, vmxnet3_main.log_default, "%U: " f, \
542  format_vlib_pci_addr, vlib_pci_get_addr(dev->pci_dev_handle), \
543  ## __VA_ARGS__)
544 
545 /* no log version, called by data plane */
548 {
549  *(volatile u32 *) ((u8 *) vd->bar[bar] + addr) = val;
550 }
551 
554 {
555  vmxnet3_log_debug (vd, "reg wr bar %u addr 0x%x val 0x%x", bar, addr, val);
556  vmxnet3_reg_write_inline (vd, bar, addr, val);
557 }
558 
561 {
562  u32 val;
563 
564  val = *(volatile u32 *) (vd->bar[bar] + addr);
565  vmxnet3_log_debug (vd, "reg rd bar %u addr 0x%x val 0x%x", bar, addr, val);
566 
567  return val;
568 }
569 
572 {
573  vmxnet3_main_t *vmxm = &vmxnet3_main;
574 
575  return (vd->flags & VMXNET3_DEVICE_F_IOVA) ? pointer_to_uword (p) :
577 }
578 
581 {
582  ring->produce++;
583  if (PREDICT_FALSE (ring->produce == rxq->size))
584  {
585  ring->produce = 0;
586  ring->gen ^= VMXNET3_RXF_GEN;
587  }
588 }
589 
592  vmxnet3_rxq_t * rxq)
593 {
594  vmxnet3_rx_desc *rxd;
595  u16 n_refill, n_alloc;
596  vmxnet3_rx_ring *ring;
597 
598  ring = &rxq->rx_ring[0];
599  n_refill = rxq->size - ring->fill;
600 
602  return 0;
603 
604  n_alloc =
605  vlib_buffer_alloc_to_ring (vm, ring->bufs, ring->produce, rxq->size,
606  n_refill);
607  if (PREDICT_FALSE (n_alloc != n_refill))
608  {
609  if (n_alloc)
610  vlib_buffer_free_from_ring (vm, ring->bufs, ring->produce, rxq->size,
611  n_alloc);
612  return clib_error_return (0, "buffer alloc failed");
613  }
614 
615  while (n_alloc)
616  {
617  rxd = &rxq->rx_desc[0][ring->produce];
618  rxd->address =
620  rxd->flags = ring->gen | VLIB_BUFFER_DATA_SIZE;
621 
623  ring->fill++;
624  n_alloc--;
625  }
626 
628 
629  return 0;
630 }
631 
634  vmxnet3_rxq_t * rxq)
635 {
636  vmxnet3_rx_desc *rxd;
637  u16 n_refill, n_alloc;
638  vmxnet3_rx_ring *ring;
639 
640  ring = &rxq->rx_ring[1];
641  n_refill = rxq->size - ring->fill;
642 
644  return 0;
645 
646  n_alloc =
647  vlib_buffer_alloc_to_ring (vm, ring->bufs, ring->produce, rxq->size,
648  n_refill);
649  if (PREDICT_FALSE (n_alloc != n_refill))
650  {
651  if (n_alloc)
652  vlib_buffer_free_from_ring (vm, ring->bufs, ring->produce, rxq->size,
653  n_alloc);
654  return clib_error_return (0, "buffer alloc failed");
655  }
656 
657  while (n_alloc)
658  {
659  rxd = &rxq->rx_desc[1][ring->produce];
660  rxd->address =
662  rxd->flags = ring->gen | VLIB_BUFFER_DATA_SIZE | VMXNET3_RXF_BTYPE;
663 
665  ring->fill++;
666  n_alloc--;
667  }
668 
670 
671  return 0;
672 }
673 
674 #endif /* __included_vmnet_vmnet_h__ */
675 /*
676  * fd.io coding-style-patch-verification: ON
677  *
678  * Local Variables:
679  * eval: (c-set-style "gnu")
680  * End:
681  */
#define foreach_vmxnet3_device_flags
Definition: vmxnet3.h:117
#define foreach_vmxnet3_show_entry
Definition: vmxnet3.h:46
static_always_inline clib_error_t * vmxnet3_rxq_refill_ring0(vlib_main_t *vm, vmxnet3_device_t *vd, vmxnet3_rxq_t *rxq)
Definition: vmxnet3.h:591
#define foreach_vmxnet3_set_cmds
Definition: vmxnet3.h:133
typedef address
Definition: ip_types.api:35
u32 vlib_log_class_t
Definition: log.h:21
u8 pad[3]
log2 (size of the packing page block)
Definition: bihash_doc.h:61
#define CLIB_CACHE_LINE_ALIGN_MARK(mark)
Definition: cache.h:60
vlib_physmem_region_index_t physmem_region
Definition: vmxnet3.h:496
format_function_t format_vmxnet3_device_name
Definition: vmxnet3.h:532
#define VMXNET3_MAX_INTRS
Definition: vmxnet3.h:106
vmxnet3_rx_desc * rx_desc[VMXNET3_RX_RING_SIZE]
Definition: vmxnet3.h:423
static_always_inline uword vmxnet3_dma_addr(vlib_main_t *vm, vmxnet3_device_t *vd, void *p)
Definition: vmxnet3.h:571
#define PREDICT_TRUE(x)
Definition: clib.h:108
unsigned long u64
Definition: types.h:89
vlib_pci_dev_handle_t pci_dev_handle
Definition: vmxnet3.h:470
vmxnet3_main_t vmxnet3_main
Definition: vmxnet3.c:28
clib_spinlock_t lock
Definition: vmxnet3.h:448
vlib_pci_addr_t pci_addr
Definition: vmxnet3.h:471
#define foreach_vmxnet3_tx_func_error
Definition: vmxnet3.h:19
#define vmxnet3_log_debug(dev, f,...)
Definition: vmxnet3.h:535
vmxnet3_tx_func_error_t
Definition: vmxnet3.h:24
u8 *( format_function_t)(u8 *s, va_list *args)
Definition: format.h:48
void vmxnet3_delete_if(vlib_main_t *vm, vmxnet3_device_t *ad)
Definition: vmxnet3.c:636
vmxnet3_dma * dma
Definition: vmxnet3.h:488
struct _vnet_device_class vnet_device_class_t
vhost_vring_addr_t addr
Definition: vhost_user.h:121
static u64 vlib_get_buffer_data_physical_address(vlib_main_t *vm, u32 buffer_index)
Definition: buffer_funcs.h:319
unsigned char u8
Definition: types.h:56
static_always_inline void vmxnet3_reg_write(vmxnet3_device_t *vd, u8 bar, u32 addr, u32 val)
Definition: vmxnet3.h:553
static_always_inline u32 vmxnet3_reg_read(vmxnet3_device_t *vd, u8 bar, u32 addr)
Definition: vmxnet3.h:560
vmxnet3_rxq_t * rxqs
Definition: vmxnet3.h:475
vlib_log_class_t log_default
Definition: vmxnet3.h:499
#define static_always_inline
Definition: clib.h:95
void * bar[2]
Definition: vmxnet3.h:472
#define foreach_vmxnet3_get_cmds
Definition: vmxnet3.h:158
#define clib_error_return(e, args...)
Definition: error.h:99
unsigned int u32
Definition: types.h:88
vlib_pci_addr_t addr
Definition: vmxnet3.h:506
clib_error_t * vmxnet3_plugin_api_hookup(vlib_main_t *vm)
Definition: vmxnet3_api.c:215
static void vlib_buffer_free_from_ring(vlib_main_t *vm, u32 *ring, u32 start, u32 ring_size, u32 n_buffers)
Free buffers from ring.
Definition: buffer_funcs.h:602
void vmxnet3_create_if(vlib_main_t *vm, vmxnet3_create_if_args_t *args)
Definition: vmxnet3.c:479
u16 msg_id_base
Definition: vmxnet3.h:498
unsigned short u16
Definition: types.h:57
vmxnet3_rx_comp_ring rx_comp_ring
Definition: vmxnet3.h:425
u32 vlib_pci_dev_handle_t
Definition: pci.h:97
typedef CLIB_PACKED(struct{u32 version;u32 guest_info;u32 version_support;u32 upt_version_support;u64 upt_features;u64 driver_data_address;u64 queue_desc_address;u32 driver_data_len;u32 queue_desc_len;u32 mtu;u16 max_num_rx_sg;u8 num_tx_queues;u8 num_rx_queues;u32 pad[4];}) vmxnet3_misc_config
vmxnet3_tx_comp_ring tx_comp_ring
Definition: vmxnet3.h:453
#define VMXNET3_RX_RING_SIZE
Definition: vmxnet3.h:95
vmxnet3_tx_comp * tx_comp
Definition: vmxnet3.h:451
#define PREDICT_FALSE(x)
Definition: clib.h:107
u32 flags
Definition: vhost_user.h:115
vlib_main_t * vm
Definition: buffer.c:294
vlib_buffer_t buffer
Definition: vmxnet3.h:520
u32 physmem_region_alloc
Definition: vmxnet3.h:497
u32 per_interface_next_index
Definition: vmxnet3.h:465
vmxnet3_txq_t * txqs
Definition: vmxnet3.h:476
clib_error_t * error
Definition: vmxnet3.h:486
#define VLIB_BUFFER_DATA_SIZE
Definition: buffer.h:51
#define VMXNET3_REG_RXPROD
Definition: vmxnet3.h:63
signed int i32
Definition: types.h:77
#define VMXNET3_RXF_GEN
Definition: vmxnet3.h:83
format_function_t format_vmxnet3_device
Definition: vmxnet3.h:531
option version
Definition: memclnt.api:17
#define foreach_vmxnet3_rxmode_flags
Definition: vmxnet3.h:32
static uword pointer_to_uword(const void *p)
Definition: types.h:131
struct _vlib_node_registration vlib_node_registration_t
static u32 vlib_buffer_alloc_to_ring(vlib_main_t *vm, u32 *ring, u32 start, u32 ring_size, u32 n_buffers)
Allocate buffers into ring.
Definition: buffer_funcs.h:520
static_always_inline void vmxnet3_rx_ring_advance_produce(vmxnet3_rxq_t *rxq, vmxnet3_rx_ring *ring)
Definition: vmxnet3.h:580
vmxnet3_tx_desc * tx_desc
Definition: vmxnet3.h:450
static u64 vlib_physmem_virtual_to_physical(vlib_main_t *vm, vlib_physmem_region_index_t idx, void *mem)
u64 uword
Definition: types.h:112
vnet_device_class_t vmxnet3_device_class
#define VMXNET3_RXF_BTYPE
Definition: vmxnet3.h:82
vmxnet3_rx_comp * rx_comp
Definition: vmxnet3.h:424
vmxnet3_rx_ring rx_ring[VMXNET3_RX_RING_SIZE]
Definition: vmxnet3.h:422
format_function_t format_vmxnet3_input_trace
Definition: vmxnet3.h:533
vmxnet3_device_t * devices
Definition: vmxnet3.h:495
static_always_inline clib_error_t * vmxnet3_rxq_refill_ring1(vlib_main_t *vm, vmxnet3_device_t *vd, vmxnet3_rxq_t *rxq)
Definition: vmxnet3.h:633
#define VMXNET3_REG_RXPROD2
Definition: vmxnet3.h:64
vlib_node_registration_t vmxnet3_input_node
(constructor) VLIB_REGISTER_NODE (vmxnet3_input_node)
Definition: input.c:369
#define VMXNET3_INPUT_REFILL_THRESHOLD
Definition: vmxnet3.h:96
vmxnet3_tx_ring tx_ring
Definition: vmxnet3.h:452
u8 vlib_physmem_region_index_t
Definition: physmem.h:43
clib_error_t * error
Definition: vmxnet3.h:513
static_always_inline void vmxnet3_reg_write_inline(vmxnet3_device_t *vd, u8 bar, u32 addr, u32 val)
Definition: vmxnet3.h:547