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Vector Packet Processing
cache.h
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1 /*
2  * Copyright (c) 2015 Cisco and/or its affiliates.
3  * Licensed under the Apache License, Version 2.0 (the "License");
4  * you may not use this file except in compliance with the License.
5  * You may obtain a copy of the License at:
6  *
7  * http://www.apache.org/licenses/LICENSE-2.0
8  *
9  * Unless required by applicable law or agreed to in writing, software
10  * distributed under the License is distributed on an "AS IS" BASIS,
11  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12  * See the License for the specific language governing permissions and
13  * limitations under the License.
14  */
15 /*
16  Copyright (c) 2005 Eliot Dresselhaus
17 
18  Permission is hereby granted, free of charge, to any person obtaining
19  a copy of this software and associated documentation files (the
20  "Software"), to deal in the Software without restriction, including
21  without limitation the rights to use, copy, modify, merge, publish,
22  distribute, sublicense, and/or sell copies of the Software, and to
23  permit persons to whom the Software is furnished to do so, subject to
24  the following conditions:
25 
26  The above copyright notice and this permission notice shall be
27  included in all copies or substantial portions of the Software.
28 
29  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
30  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
31  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
32  NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
33  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
34  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
35  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
36 */
37 
38 #ifndef included_clib_cache_h
39 #define included_clib_cache_h
40 
42 
43 /*
44  * Allow CFLAGS to override the arch-specific cache line size
45  */
46 #ifndef CLIB_LOG2_CACHE_LINE_BYTES
47 
48 #if defined(__x86_64__) || defined(__ARM_ARCH_7A__) || defined(__i386__)
49 #define CLIB_LOG2_CACHE_LINE_BYTES 6
50 #endif
51 
52 #ifdef __aarch64__
53 #define CLIB_LOG2_CACHE_LINE_BYTES 7
54 #endif
55 
56 /* Default cache line size of 32 bytes. */
57 #ifndef CLIB_LOG2_CACHE_LINE_BYTES
58 #define CLIB_LOG2_CACHE_LINE_BYTES 5
59 #endif
60 
61 #endif /* CLIB_LOG2_CACHE_LINE_BYTES defined */
62 
63 #if (CLIB_LOG2_CACHE_LINE_BYTES >= 9)
64 #error Cache line size 512 bytes or greater
65 #endif
66 
67 #define CLIB_CACHE_LINE_BYTES (1 << CLIB_LOG2_CACHE_LINE_BYTES)
68 #define CLIB_CACHE_LINE_ALIGN_MARK(mark) u8 mark[0] __attribute__((aligned(CLIB_CACHE_LINE_BYTES)))
69 
70 /* Read/write arguments to __builtin_prefetch. */
71 #define CLIB_PREFETCH_READ 0
72 #define CLIB_PREFETCH_LOAD 0 /* alias for read */
73 #define CLIB_PREFETCH_WRITE 1
74 #define CLIB_PREFETCH_STORE 1 /* alias for write */
75 
76 #define _CLIB_PREFETCH(n,size,type) \
77  if ((size) > (n)*CLIB_CACHE_LINE_BYTES) \
78  __builtin_prefetch (_addr + (n)*CLIB_CACHE_LINE_BYTES, \
79  CLIB_PREFETCH_##type, \
80  /* locality */ 3);
81 
82 #define CLIB_PREFETCH(addr,size,type) \
83 do { \
84  void * _addr = (addr); \
85  \
86  ASSERT ((size) <= 4*CLIB_CACHE_LINE_BYTES); \
87  _CLIB_PREFETCH (0, size, type); \
88  _CLIB_PREFETCH (1, size, type); \
89  _CLIB_PREFETCH (2, size, type); \
90  _CLIB_PREFETCH (3, size, type); \
91 } while (0)
92 
93 #undef _
94 
95 #endif /* included_clib_cache_h */
96 
97 
98 /*
99  * fd.io coding-style-patch-verification: ON
100  *
101  * Local Variables:
102  * eval: (c-set-style "gnu")
103  * End:
104  */