2.5.10. IPSec Crypto HW: IP4 Routed-Forwarding¶
Following sections include Throughput Speedup Analysis for VPP multi- core multi-thread configurations with no Hyper-Threading, specifically for tested 2t2c (2threads, 2cores) and 4t4c scenarios. 1t1c throughput results are used as a reference for reported speedup ratio. VPP IPSec encryption is accelerated using DPDK cryptodev library driving Intel Quick Assist (QAT) crypto PCIe hardware cards. Performance is reported for VPP running in multiple configurations of VPP worker thread(s), a.k.a. VPP data plane thread(s), and their physical CPU core(s) placement.
22.214.171.124. NDR Throughput¶
VPP NDR 64B packet throughput speedup ratio is presented in the graphs below for 40ge2p1xl710 network interface card.
126.96.36.199. PDR Throughput¶
VPP PDR 64B packet throughput speedup ratio is presented in the graphs below for 40ge2p1xl710 network interface card.
188.8.131.52.1. NIC 40ge2p1xl710¶
VPP PDR 64B packet throughput in 1t1c setup (1thread, 1core) is presented in the graph below. PDR measured for 0.5% packet loss ratio.
Figure 2. Throughput Speedup Analysis - Multi-Core Speedup Ratio - Normalized PDR Throughput for Phy-to-Phy IPSEC HW.
CSIT source code for the test cases used for above plots can be found in CSIT git repository.